Computer flash memory chips are used in many applications, including hand held computing devices, wireless telephones, and digital cameras. In computer flash memory, a flash memory core containing a matrix of memory elements is surrounded by a periphery containing peripheral elements. The elements in the core assume physical states which represent bits of data. Consequently, by configuring the core elements appropriately, data (such as preselected telephone numbers in a wireless telephone or digital images in a digital camera) may be stored in the core and subsequently read by detecting the physical state of one or more core elements. Flash memory chips fall into two main categories, namely, those having a so-called "NOR" architecture and those having a so-called "NAND" architecture. Of importance to the present invention is flash memory chips having NOR architectures, although the present invention applies to NAND architectures as well.
To enable the individual memory elements of a flash memory chip to maintain the physical state with which they have been programmed, each memory region must be isolated from its neighboring regions. In the case of the peripheral regions, isolation is achieved by a method referred to in the art as local oxidation silicon, or "LOCOS". LOCOS isolation requires disposing an inactive silicon oxide insulator between neighboring active regions. While acceptable for isolating peripheral regions, however, LOCOS isolation is less than desirable for memory core cell isolation. This is because it is desirable to minimize the distance between core cells to increase memory density, and the silicon in LOCOS isolation tends to encroach on the core memory cells, thereby decreasing core cell (and, hence, memory) density.
Accordingly, a process that renders closely spaced memory core cells, referred to in the art as "self-aligned" cells, has been developed. Self-aligned memory core cells are isolated from each other by shallow trenches that are etched into the silicon substrate of the core, between adjacent memory cells. The memory cells between the trenches are established by one or more layers of polysilicon material, with the layers being aligned with each other and not overlapping the trenches.
Just on top of the silicon substrate a very thin tunnel oxide layer is grown. This tunnel oxide layer is essential to the proper functioning of the flash memory chip. Accordingly, it is desirable not to damage the tunnel oxide layer during trench etching, because such damage can reduce the endurance characteristics of the flash memory chip. Unfortunately, during trench etching it can happen that the portions of the tunnel oxide layer next to the trench being formed are damaged or otherwise degraded. As mentioned above, such damage to the tunnel oxide layer diminishes the lifecycle of the chip. As recognized herein, however, it is possible to protect the edges of the tunnel oxide layer in a flash memory core during isolation trench etching, thereby promoting the usefulness and/or endurance of the flash memory.
Accordingly, it is an object of the present invention to provide a method and system for isolating core memory cells of a computer flash memory device. Another object of the present invention is to provide a method and system for isolating core memory cells of a flash memory device which does not degrade the tunnel oxide layer during etching. Still another object of the present invention is to provide a method and system for isolating core memory cells of a flash memory device by establishing isolation trenches between the cells such that the tunnel oxide layer of the memory core of the device is protected during etching. Yet another object of the present invention is to provide a method and system for isolating core memory elements of a flash memory device that is easy to use and cost effective.